Job Details

Req ID: 135002

Region: Americas

Country: USA

State/Province: Texas

City: Austin

Senior Staff FPGA Design Engineer

Celestica HPS is seeking a highly motivated and self-driven candidate qualified for the position of Senior Staff FPGA Design Engineer to help design and build market-leading Hardware Platform Solutions. As a Subject Matter Expert and a member of the design and development group, the successful candidate will be responsible for developing FPGA designs for Ethernet Switching, Server and Storage Products. They will participate in the full FPGA development flow, including specification, coding, simulation, physical implementation, and onboard debugging. They will communicate and cooperate with cross-functional teams (hardware, software, etc.) to ensure robust product development.

Responsibilities

• Work closely with platform architects, board designers, and software designers to understand and define architecture requirements.
• Develop design specifications that fulfill project requirements.
• Collaborate with hardware engineers on logic-related schematic design and review.
• Drive device selection decisions.
• Ensure on-time delivery of RTL designs, module-level verification, and test case definitions.
• Drive the entire back-end design flow, including design constraints, floor-planning, and timing closure.
• Perform FPGA validation and issue debugging on real hardware boards.
• Collaborate with peers across different functional teams and mentor junior design engineers.
• Provide accurate and timely project schedule estimates.

Skills Experience Requirements

• Minimum 8+ years of experience as an FPGA Design Engineer; familiar with Xilinx and Intel (Altera) FPGAs, Lattice CPLD/FPGAs, etc.
• In-depth knowledge of Verilog, SystemVerilog, RTL design, FPGA design, and FPGA design tools (e.g., ISE, Vivado, Quartus II, ModelSim, etc.).
• In-depth knowledge of high-speed serial protocols such as PCIe, Ethernet, DDR, and LVDS; familiar with low-speed interfaces such as SPI, I2C, UART, LPC, MDIO, etc.
• Familiarity with UVM constrained-random coverage-driven concepts, assertion-based verification, and functional coverage techniques.
• Excellent problem-solving and hands‑on debugging skills.
• Excellent communication skills with professional English proficiency (verbal and written).
• Strong interpersonal skills and the ability to understand customer needs, expectations, and perspectives.
• Demonstrated ability to multitask across multiple projects.

Typical Education

• Bachelor's degree in Computer Science, Computer Engineering, or Electrical Engineering; a Master's degree is preferred.

Notes

This job description is not intended to be an exhaustive list of all duties and responsibilities of the position. Employees are held accountable for all duties of the job. Job duties and the % of time identified for any function are subject to change at any time.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

Celestica's policy on equal employment opportunity prohibits discrimination based on race, color, creed, religion, national origin, gender, sexual orientation, gender identity, age, marital status, veteran or disability status, or other characteristics protected by law.

This policy applies to hiring, promotion, discharge, pay, fringe benefits, job training, classification, referral and other aspects of employment and also states that retaliation against a person who files a charge of discrimination, participates in a discrimination proceeding, or otherwise opposes an unlawful employment practice will not be tolerated. All information will be kept confidential according to EEO guidelines.