Job Details

What You'll Be Doing

• Architect and develop AI-driven solutions for static timing, constraints quality, and closure prediction.
• Integrate heterogeneous data sources—timing reports, constraint graphs, design metadata, silicon correlation—into structured knowledgebases and training pipelines.
• Develop autonomous analysis agents that interact with timing tools (e.g., PrimeTime, Nanotime, Tempus) to perform multi‑corner, multi‑mode optimization and constraint debugging.
• Implement scalable orchestration across Flow‑Server and Digital Engineer platforms, enabling AI‑in‑loop decision‑making for sign‑off readiness.
• Collaborate with methodology and sign‑off teams to validate models on live projects, improving coverage, predictability, and engineering productivity.
• Build interpretable AI pipelines using graph neural networks, large language models, and process‑aware reasoning engines for timing closure recommendations.
• Be responsible for the end‑to‑end lifecycle—from data curation and model training to deployment, monitoring, and continuous improvement in production environments.

What We Need To See

• BS (or equivalent experience) in Electrical or Computer Engineering with 12+ years of experience in AI/ML solution development, ideally for EDA, semiconductor, or complex data domains.
• Strong background in VLSI/ASIC design—with deep understanding of timing, constraints, STA, or sign‑off workflows.
• Proficiency in Python, PyTorch/TensorFlow, and graph or agentic AI frameworks (e.g., LangGraph, LangChain, Ray, NetworkX).
• Experience developing data pipelines, knowledge graphs, or process models for structured engineering data.
• Working knowledge of timing tools (PrimeTime, Nanotime, Tempus) and scripting integration with EDA environments.
• Experience with AI orchestration frameworks, reasoning based on prompts, and multi‑agent automation is highly desirable.
• Strong problem‑solving skills, technical depth, and a mentality for experimentation and continuous learning.

Ways To Stand Out From The Crowd

• Experience with constraint validation, false‑path detection, and timing‑exception modeling.
• Prior exposure to AI in physical design automation, silicon/process modeling, or EDA flow automation.
• Contributions to open‑source AI or flow automation projects.
• Publications or patents in AI for design automation or semiconductor engineering.

Benefits

• Base salary based on location, experience, and market benchmarking: $196,000–$310,500 (Level 5) and $232,000–$368,000 (Level 6).
• Eligibility for equity and comprehensive benefits package.
• Competitive salary and benefits package aligned with industry standards.
• For more information on benefits, visit www.nvidiabenefits.com.

Equal Employment Opportunity

As a diverse and inclusive workplace, NVIDIA is an equal‑opportunity employer and prohibits discrimination based on race, religion, color, national origin, gender, sexual orientation, age, disability, or veteran status. We celebrate and value the differences that make us stronger and better at solving challenging problems.